Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
8
2
SECTION 8
EEPROM
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4
8.1 Introduction
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This section describes the EEPROM which is located at address $0140 and
consists of 128 bytes. Programming the EEPROM can be done by the user on a
single byte basis by manipulating the programming register located at address
$001C.
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7
Also, the mask option register (MOR), which consists of two additional EEPROM
bytes, is discussed.
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8.2 EEPROM Programming Register (EEPROG)
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The contents and use of the programming register are discussed here.
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11
12
13
14
A
Bit 7
0
6
CPEN
0
5
0
4
ER1
0
3
ER0
0
2
LATCH
0
1
EERC
0
Bit 0
EEPGM
0
Read:
Write:
Reset:
EEPROG
$001C
0
0
= Unimplemented
Figure 8-1. EEPROM Programming Register
CPEN — Charge Pump Enable
When set, CPEN enables the charge pump which produces the internal
EEPROM programming voltage. This bit should be set concurrently with the
LATCH bit. The programming voltage will not be available until EEPGM is set.
The charge pump should be disabled when not in use. CPEN is readable and
writable and is cleared by reset.
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17
18
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20
ER1 and ER0 — Erase Select Bits
ER1 and ER0 form a 2-bit field which is used to select one of three erase modes:
byte, block, or bulk. Table 8-1 shows the modes selected for each bit
configuration. These bits are readable and writable and are cleared by reset.
EEPROM
Rev. 1.0
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