Freescale Semiconductor, Inc.
GENERAL RELEASE SPECIFICATION
7.4 Port C
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2
Port C is an 8-bit bidirectional port which can share pins PC3–PC7 with the A/D
subsystem. The port C data register is located at address $0002 and its data
direction register (DDR) is located at address $0006. Reset does not affect the
data registers, but clears the DDRs, thereby setting all of the port pins to input
mode. Writing a logic one to a DDR bit sets the corresponding port pin to output
mode (see Figure 7-3). Two port C pins, PC0 and PC1, can source and sink a
higher current than a typical I/O pin. See SECTION 13 ELECTRICAL
SPECIFICATIONS regarding current specifications.
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4
Port C may be used for general I/O applications when the A/D subsystem is
disabled. The ADON bit in register ADSC is used to enable/disable the A/D
subsystem. Care must be exercised when using pins PC0–PC2 while the A/D
subsystem is enabled. Accidental changes to bits that affect pins PC3–PC7 in the
data or DDR registers will produce unpredictable results in the A/D subsystem. See
SECTION 9 ANALOG-TO-DIGITAL CONVERTER.
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8
READ $0006
HIGH CURRENT
CAPABILITY, PC0
AND PC1 ONLY
WRITE $0006
9
DATA DIRECTION
REGISTER BIT
RESET
(RST)
WRITE $0002
READ $0002
I/O
PIN
DATA
REGISTER BIT
OUTPUT
10
11
12
13
14
A
INTERNAL HC05
DATA BUS
Figure 7-3. Port C I/O Circuitry
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20
INPUT/OUTPUT PORTS
Rev. 1.0
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