Table 4-12 Quad Timer B Registers Address Map (Continued)
(TMRB_BASE = $00 F080)
Quad Timer B is NOT available in the 56F8167 device
Register Acronym
Address Offset
Register Description
TMRB0_CNTR
TMRB0_CTRL
$5
$6
$7
$8
$9
$A
Counter Register
Control Register
TMRB0_SCR
Status and Control Register
Comparator Load Register 1
Comparator Load Register 2
Comparator Status and Control Register
Reserved
TMRB0_CMPLD1
TMRB0_CMPLD2
TMRB0_COMSCR
TMRB1_CMP1
TMRB1_CMP2
TMRB1_CAP
$10
$11
$12
$13
$14
$15
$16
$17
$18
$19
$1A
Compare Register 1
Compare Register 2
Capture Register
TMRB1_LOAD
TMRB1_HOLD
TMRB1_CNTR
TMRB1_CTRL
TMRB1_SCR
Load Register
Hold Register
Counter Register
Control Register
Status and Control Register
Comparator Load Register 1
Comparator Load Register 2
Comparator Status and Control Register
Reserved
TMRB1_CMPLD1
TMRB1_CMPLD2
TMRB1_COMSCR
TMRB2_CMP1
TMRB2_CMP2
TMRB2_CAP
$20
$21
$22
$23
$24
$25
$26
$27
$28
$29
$2A
Compare Register 1
Compare Register 2
Capture Register
TMRB2_LOAD
TMRB2_HOLD
TMRB2_CNTR
TMRB2_CTRL
TMRB2_SCR
Load Register
Hold Register
Counter Register
Control Register
Status and Control Register
Comparator Load Register 1
Comparator Load Register 2
Comparator Status and Control Register
Reserved
TMRB2_CMPLD1
TMRB2_CMPLD2
TMRB2_COMSCR
TMRB3_CMP1
TMRB3_CMP2
TMRB3_CAP
$30
$31
$32
Compare Register 1
Compare Register 2
Capture Register
56F8367 Technical Data, Rev. 9
54
Freescale Semiconductor
Preliminary
FREESCALE [ Freescale ]
