Signal Pins
Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA (Continued)
State
During
Reset
Signal
Name
Pin
No.
Ball No.
Type
Signal Description
ISB0
61
N8
Schmitt
Input
Input,
pull-up
enabled
ISB0 - 2 — These three input current status pins are used for
top/bottom pulse width correction in complementary channel
operation for PWMB.
(GPIOD10)
Schmitt
Input/
Output
Port D GPIO — These GPIO pins can be individually
programmed as input or output pins.
ISB1
(GPIOD11)
63
64
L8
P8
At reset, these pins default to ISB functionality.
ISB2
(GPIOD12)
To deactivate the internal pull-up resistor, clear the appropriate bit
of the GPIOD_PUR register. For details, see Part 6.5.8.
FAULTB0
FAULTB1
FAULTB2
FAULTB3
ANA0
67
68
N9
L9
Schmitt
Input
Input,
pull-up
enabled
FAULTB0 - 3 — These four fault input pins are used for disabling
selected PWMB outputs in cases where fault conditions originate
off-chip.
69
L10
P11
G13
H13
G12
F13
F12
H14
G14
E13
D14
To deactivate the internal pull-up resistor, set the PWMB bit in the
SIM_PUDR register. For details, see Part 6.5.8.
72
100
101
102
103
104
105
106
107
113
Input
Input
Input
Analog
Input
ANA0 - 3 — Analog inputs to ADC A, channel 0
ANA1
ANA2
ANA3
ANA4
Analog
Input
ANA4 - 7 — Analog inputs to ADC A, channel 1
ANA5
ANA6
ANA7
VREFH
Analog
Input
VREFH — Analog Reference Voltage High. VREFH must be less
than or equal to VDDA_ADC.
VREFP
VREFMID
VREFN
112
111
110
109
D13
E14
F14
E12
Input/
Output
Analog
Input/
Output
VREFP, VREFMID & VREFN — Internal pins for voltage reference
which are brought off-chip so they can be bypassed. Connect to a
0.1μF low ESR capacitor.
VREFLO
Input
Analog
Input
VREFLO — Analog Reference Voltage Low. This should normally
be connected to a low-noise VSS
.
56F8367 Technical Data, Rev. 9
Freescale Semiconductor
Preliminary
35
FREESCALE [ Freescale ]
