Interrupt Vector Table
1
Table 4-5 Interrupt Vector Table Contents (Continued)
Vector
Number
Priority
Level
Vector Base
Address +
Peripheral
Interrupt Function
FLEXCAN 29
0-2
P:$3A
P:$3C
P:$3E
P:$40
P:$42
P:$44
P:$46
FLEXCAN Message Buffer Interrupt
GPIOF
GPIOE
GPIOD
GPIOC
GPIOB
GPIOA
30
31
32
33
34
35
0-2
0-2
0-2
0-2
0-2
0-2
GPIO F
GPIO E
GPIO D
GPIO C
GPIO B
GPIO A
Reserved
SPI1
SPI1
SPI0
SPI0
SCI1
SCI1
38
39
40
41
42
43
0-2
0-2
0-2
0-2
0-2
0-2
P:$4C
P:$4E
P:$50
P:$52
P:$54
P:$56
SPI 1 Receiver Full
SPI 1 Transmitter Empty
SPI 0 Receiver Full
SPI 0 Transmitter Empty
SCI 1 Transmitter Empty
SCI 1 Transmitter Idle
Reserved
SCI1
45
46
47
48
49
50
0-2
0-2
0-2
0-2
0-2
0-2
P:$5A
P:$5C
P:$5E
P:$60
P:$62
P:$64
SCI 1 Receiver Error
SCI 1 Receiver Full
SCI1
DEC1
DEC1
DEC0
DEC0
Quadrature Decoder #1 Home Switch or Watchdog
Quadrature Decoder #1 INDEX Pulse
Quadrature Decoder #0 Home Switch or Watchdog
Quadrature Decoder #0 INDEX Pulse
Reserved
TMRD
TMRD
TMRD
TMRD
TMRC
TMRC
TMRC
TMRC
52
53
54
55
56
57
58
59
0-2
0-2
0-2
0-2
0-2
0-2
0-2
0-2
P:$68
P:$6A
P:$6C
P:$6E
P:$70
P:$72
P:$74
P:$76
Timer D, Channel 0
Timer D, Channel 1
Timer D, Channel 2
Timer D, Channel 3
Timer C, Channel 0
Timer C, Channel 1
Timer C, Channel 2
Timer C, Channel 3
56F8345 Technical Data, Rev. 17
Freescale Semiconductor
Preliminary
43
FREESCALE [ Freescale ]
