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56F807_1 参数 Datasheet PDF下载

56F807_1图片预览
型号: 56F807_1
PDF下载: 下载PDF文件 查看货源
内容描述: 16位数字信号控制器 [16-bit Digital Signal Controllers]
分类和应用: 控制器
文件页数/大小: 60 页 / 649 K
品牌: FREESCALE [ Freescale ]
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Table 2-7 Data Bus Signals  
No. of  
Pins  
Signal  
Name  
Signal  
Type  
State During  
Signal Description  
Reset  
16  
D0–D15  
Input/O  
utput  
Tri-stated  
Data Bus— D0–D15 specify the data for external program or data  
memory accesses. D0–D15 are tri-stated when the external bus is  
inactive. Internal pullups may be active.  
Table 2-8 Bus Control Signals  
No. of  
Pins  
Signal  
Name  
Signal  
Type  
State During  
Signal Description  
Reset  
1
1
1
PS  
DS  
WR  
Output  
Tri-stated  
Program Memory Select—PS is asserted low for external program  
memory access.  
Output  
Output  
Tri-stated  
Tri-stated  
Data Memory Select—DS is asserted low for external data memory  
access.  
Write Enable—WR is asserted during external memory write cycles.  
When WR is asserted low, pins D0–D15 become outputs and the device  
puts data on the bus. When WR is deasserted high, the external data is  
latched inside the external device. When WR is asserted, it qualifies the  
A0–A15, PS, and DS pins. WR can be connected directly to the WE pin of  
a Static RAM.  
1
RD  
Output  
Tri-stated  
Read Enable—RD is asserted during external memory read cycles. When  
RD is asserted low, pins D0–D15 become inputs and an external device is  
enabled onto the device’s data bus. When RD is deasserted high, the  
external data is latched inside the device. When RD is asserted, it qualifies  
the A0–A15, PS, and DS pins. RD can be connected directly to the OE pin  
of a Static RAM or ROM.  
2.5 Interrupt and Program Control Signals  
Table 2-9 Interrupt and Program Control Signals  
No. of  
Pins  
Signal  
Name  
Signal  
Type  
State During  
Reset  
Signal Description  
1
IRQA  
Input  
(Schmitt)  
Input  
Input  
External Interrupt Request A—The IRQA input is a synchronized  
external interrupt request that indicates that an external device is  
requesting service. It can be programmed to be level-sensitive or  
negative-edge-triggered.  
1
IRQB  
Input  
(Schmitt)  
External Interrupt Request B—The IRQB input is an external  
interrupt request that indicates that an external device is requesting  
service. It can be programmed to be level-sensitive or  
negative-edge-triggered.  
56F807 Technical Data Technical Data, Rev. 16  
12  
Freescale Semiconductor  
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