Serial Peripheral Interface (SPI) Signals
2.8 Serial Peripheral Interface (SPI) Signals
Table 2-12 Serial Peripheral Interface (SPI) Signals
No. of
Pins
Signal
Name
Signal
Type
State During
Reset
Signal Description
1
MISO
Input/
Output
Input
SPI Master In/Slave Out (MISO)—This serial data pin is an input to a
master device and an output from a slave device. The MISO line of a
slave device is placed in the high-impedance state if the slave device is
not selected.
GPIOE6 Input/Outp
Input
Input
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that can
individually be programmed as input or output pin.
ut
After reset, the default state is MISO.
1
MOSI
Input/
SPI Master Out/Slave In (MOSI)—This serial data pin is an output from
a master device and an input to a slave device. The master device
places data on the MOSI line a half-cycle before the clock edge that the
slave device uses to latch the data.
Output
GPIOE5 Input/Outp
Input
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that can
ut
individually be programmed as input or output pin.
After reset, the default state is MOSI.
1
SCLK
Input/Outp
ut
Input
Input
SPI Serial Clock—In master mode, this pin serves as an output,
clocking slaved listeners. In slave mode, this pin serves as the data
clock input.
GPIOE4 Input/Outp
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that can
ut
individually be programmed as input or output pin.
After reset, the default state is SCLK.
1
SS
Input
Input
Input
SPI Slave Select—In master mode, this pin is used to arbitrate multiple
masters. In slave mode, this pin is used to select the slave.
GPIOE7 Input/Outp
Port E GPIO—This pin is a General Purpose I/O (GPIO) pin that can
ut
individually be programmed as input or output pin.
After reset, the default state is SS.
56F807 Technical Data Technical Data, Rev. 16
Freescale Semiconductor
15
FREESCALE [ Freescale ]
