Peripheral Memory-Mapped Registers
Table 4-23 Digital-to-Analog Converter 0 Registers Address Map
(DAC0_BASE = $00 F1C0)
Register Acronym
Address Offset
$0
Register Description
DAC0_CTRL
DAC0_DATA
DAC0_STEP
DAC0_MINVAL
DAC0_MAXVAL
Control Register
Data Register
Step Register
$1
$2
$3
$4
Minimum Value Register
Maximum Value Register
Table 4-24 Digital-to-Analog Converter 0 Registers Address Map
(DAC1_BASE = $00 F1D0)
Register Acronym
Address Offset
Register Description
DAC1_CTRL
DAC1_DATA
DAC1_STEP
DAC1_MINVAL
DAC1_MAXVAL
$0
$1
$2
$3
$4
Control Register
Data Register
Step Register
Minimum Value Register
Maximum Value Register
Table 4-25 Comparator A Registers Address Map
(CMPA_BASE = $00 F1E0)
Register Acronym
Address Offset
Register Description
CMPA_CTRL
CMPA_STAT
CMPA_FILT
$0
$1
$2
Control Register
Status Register
Filter Register
Table 4-26 Comparator B Registers Address Map
(CMPB_BASE = $00 F1F0)
Register Acronym
Address Offset
Register Description
CMPB_CTRL
CMPB_STAT
CMPB_FILT
$0
$1
$2
Control Register
Status Register
Filter Register
56F8037 Data Sheet, Rev. 3
Freescale Semiconductor
Preliminary
59