FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
Table 25. HSON Control Bits
Logic
HS State
HS OFF, in Normal and Standby modes.
HS ON, in Normal and Standby modes. (57)
0
1
.
Notes
57. When HS is turned OFF due to an overtemperature condition, it can be turned ON again by setting the appropriate control bit to 1. Error
bits are latched in the IOR register.
Table 26. Input/Output Register Status Bits
Name
Logic
Description
V2LTH > 4.0 V.
0
1
0
1
0
1
0
1
V2LOW
V2LTH < 4.0 V.
No HS overtemperature.
HS overtemperature.
VBF(EW) > 5.8 V.
HSOT
VSUPLOW
DEBUG
VBF(EW) < 5.8 V.
SBC not in Debug mode.
SBC accepts command to go to Debug modes (no Watchdog).
WAKE-UP REGISTER (WUR)
Tables 27 through 29 contain the Wake-Up Register information. Local wake-up inputs L0:L3 can be used in both Normal and
Standby modes as port expander, as well as for waking up the SBC from Sleep or Stop modes (Table 27).
Table 27. Wake-Up Register
WUR
R/W
D3
D2
D1
D0
W
R
–
LCTR3
L3WU
0
LCTR2
L2WU
0
LCTR1
L1WU
0
LCTR0
L0WU
0
$100b
Reset Value
Reset Condition (Write) (58)
Notes
–
POR, NR2R, N2R, STB2R, STO2R
58. See Table 13, page 42, for definitions of reset conditions.
Wake-up inputs can be configured by pair. L0 and L1 can
be configured together, and L1 and L2, and L2 and L3 can be
configured together (Table 28).
33742
Analog Integrated Circuit Device Data
Freescale Semiconductor
46
FREESCALE [ Freescale ]
