FUNCTIONAL DEVICE OPERATION
LOGIC COMMANDS AND REGISTERS
MODE CONTROL REGISTER (MCR)
Tables 15 through 17 describes the various Mode Control Registers.
Table 15. Mode Control Register
MCR
R/W
D3
D2
D1
D0
$000b
W
R
–
–
MCTR2
VDDTEMP
0
MCTR1
GFAIL
MCTR0
WDRST
0
BATFAIL(49)
Reset Value
Reset Condition (Write)(50)
Notes
–
–
0
–
POR, RESET
POR, RESET
POR, RESET
49. BATFAIL bit cannot be set by SPI. BATFAIL is set when VSUP falls below 3.0 V.
50. See Table 13 page 42, for definitions of reset conditions
Table 16. Mode Control Register Control Bits
MCTR MCTR MCTR
33742S Mode
Description
2
1
0
To enter/exit Debug Mode, refer to detailed description in Debug Mode: Hardware and
Software Debug with the 33742, page 30.
0
0
0
Enter/Exit Debug
Mode
0
0
0
0
1
1
1
0
1
Normal
–
–
–
Standby
Stop, Watchdog OFF
(51)
0
1
1
Stop, Watchdog ON
–
(51)
1
0
0
1
1
0
1
0
1
Sleep (52)
Normal
Standby
Stop
–
No Watchdog running. Debug Mode.
1
1
1
Notes
51. Watchdog ON or OFF depends on RCR bit D3.
52. Before entering Sleep mode, BATFAIL bit in MCR must be previously cleared (MCR read operation), and NOSTOP bit in RCR must be
previously set to logic [1].
Table 17. Mode Control Register Status Bits
Name
Logic
Description
VSUP was not below VBF
VSUP has been below VBF
No overtemperature pre-warning.
.
0
1
0
1
0
1
0
1
BATFAIL
.
VDDTEMP
GFAIL
Temperature pre-warning on VDD regulator (bit latched).
No failure.
CAN Failure or HS overtemperature or V2 low.
No watchdog reset occurred.
WDRST
Watchdog reset occurred.
33742
Analog Integrated Circuit Device Data
Freescale Semiconductor
43
FREESCALE [ Freescale ]
