CMS4A16LAx–75Ex
T0
T2
T3
T1
T4
T5
T6
T7
CLK
Command
Read
NOP
NOP
NOP
Read
NOP
NOP
NOP
X=2cycles
Bank
Col n
Bank
Col b
Address
DQ
Dout
n
Dout
n+1
Dout
n+2
Dout
n+3
Dout
b
CAS Latency=3
Figure 4. Consecutive Burst Reads -Transition from Burst of 4 Read to a Single read for CAS Latency 1,2,3
T0
T2
T3
T1
T4
CLK
Command
Read
Read
Read
Read
NOP
Bank
Col n
Bank
Col a
Bank
Col x
Bank
Col m
Address
DQ
Dout
n
Dout
Dout
Dout
m
a
x
CAS Latency=1
Figure 5. Random Read Accesses for CAS Latency =1,2,3
21
Rev. 0.5, May. ‘07