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Epson Research and Development
Vancouver Design Center
7.3 Memory Interface Timing
7.3.1 EDO-DRAM Read, Write, Read-Write Timing
t1
Memory
Clock
t2
RAS#
t3
t5 t6
t4
t1
t7
CAS#
MA
t8
t9
t10
t11 t10 t11
C1
C2
C3
R
t12
t13
WE# (read)
MD (read)
t17
t15
t14
t16
d1
d2
d3
t19
t18
WE#(write)
MD(write)
t21
t20
t22
d1
d2
d3
Figure 7-12: EDO-DRAM Page Mode Timing
t1
Memory
Clock
RAS#
t5 t6
t3
t4
t1
t7
CAS#
t8
t10 t11
t9
MA
C1
C2
C3
C2
C3
R
C1
t12
t19
t23
t24
WE#
t15
t14
t25
t26
MD(Read)
MD(Write)
d1
d2
d3
t20 t21
t22
d1
d2
d3
Figure 7-13: EDO-DRAM Read-Write Timing
S1D13506
X25B-A-001-10
Hardware Functional Specification
Issue Date: 01/02/06
EPSON [ EPSON COMPANY ]
