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Epson Research and Development
Vancouver Design Center
8.3.5 Memory Configuration Registers
Memory Configuration Register
REG[020h]
RW
Memory Type Memory Type
n/a
n/a
n/a
n/a
n/a
n/a
Bit 1
Bit 0
bits 1-0
Memory Type Bits [1:0]
These bits specify the memory type.
Table 8-11: Memory Type Selection
Memory Type Bits [1:0]
Memory Type
00
01
10
11
EDO-DRAM with 2-CAS#
FPM-DRAM with 2-CAS#
EDO-DRAM with 2-WE#
FPM-DRAM with 2-WE#
DRAM Refresh Rate Register
REG[021h]
RW
DRAM
Refresh Rate Refresh Rate Refresh Rate
Bit 2 Bit 1 Bit 0
DRAM
DRAM
Refresh
Select Bit 1
Refresh
Select Bit 0
n/a
n/a
n/a
bits 7-6
Refresh Select Bits [1:0]
These bits specify the type of DRAM refresh used while in power save mode.
Table 8-12: Refresh Selection
Refresh Select Bits [1:0]
DRAM Refresh Type
CBR Refresh
00
01
1X
Self-Refresh
No Refresh
Note
These bits should not be changed while power save mode is enabled.
S1D13506
X25B-A-001-10
Hardware Functional Specification
Issue Date: 01/02/06