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EDD1208ALTA-7A 参数 Datasheet PDF下载

EDD1208ALTA-7A图片预览
型号: EDD1208ALTA-7A
PDF下载: 下载PDF文件 查看货源
内容描述: 128 M位同步DRAM是双倍数据速率( 4 -银行, SSTL_2 ) [128 M-bit Synchronous DRAM with Double Data Rate (4-bank, SSTL_2)]
分类和应用: 存储内存集成电路光电二极管动态存储器双倍数据速率时钟
文件页数/大小: 78 页 / 1650 K
品牌: ELPIDA [ ELPIDA MEMORY ]
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EDD1204ALTA, EDD1208ALTA, EDD1216ALTA  
11.2 Write to Write Command Interval  
During a write cycle, when new write command is issued, the previous burst will terminate and the new burst will  
begin with new write command. WRITE will be interrupted by another WRITE.  
The interval between commands is minimum 1 cycle. Each write command can be issued in every clock without  
any restriction.  
Burst length = 4  
T0  
T1  
T2  
T3  
T4  
T5  
1 cycle  
CLK  
/CLK  
CKE  
/CAS latency = 2, 2.5  
Command  
WRITE A  
WRITE B  
DQS  
DQ  
DB3  
DB4  
DA1  
DA2  
DB1  
DB2  
31  
Preliminary Data Sheet E0136E30  
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