EDD1204ALTA, EDD1208ALTA, EDD1216ALTA
11. Read/Write Command Interval
11.1 Read to Read Command Interval
During a read cycle, when new read command is issued, it will be effective after /CAS latency, even if the previous
read operation is not completed. READ will be interrupted by another READ.
The interval between commands is minimum 1 cycle. Each read command can be issued in every clock without any
restriction.
Burst length = 4
T0
T1
T2
T3
T4
T5
T6
1 cycle
CLK
/CLK
CKE
/CAS latency = 2
Command
READ A
READ B
Hi-Z
DQ
QA1
QA2
QB1
QB2
QB3
QB4
/CAS latency = 2.5
Command
READ A
READ B
Hi-Z
DQ
QA1
QA2
QB1
QB2
QB3
QB4
30
Preliminary Data Sheet E0136E30