DM9016
3-port switch with Processor Interface
P_CTRL
P_STUS
P_RATE
P_BW
Per Port Control Data Register
Per Port Status Data Register
Per Port Ingress and Egress Rate Control Register
Bandwidth Control Register
61H
62H
66H
67H
68H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
01H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
00H
02H
00H
00H
00H
00H
00H
00H
00H
0FH
00H~FFH
50H,FAH
XXH
P_UNICAST Per Port Block Unicast ports Control Register
P_MULTI
P_BCAST
P_UNKNWN Per Port Block Unknown ports Control Register
P_SSTP
P_PRI
VLAN_TAGL Per Port VLAN Tag Low Byte Register
VLAN_TAGH Per Port VLAN Tag High Byte Register
EACSR_1
EAD0
Per Port Block Multicast ports Control Register
Per Port Block Broadcast ports Control Register
69H
6AH
6BH
6CH
6DH
6EH
6FH
70H
71H
72H
73H
74H
Per Port Security & STP Register
Per Port Priority Queue Control Register
Ethernet Address Control / Status Register 1
MAC Address bit 07~00
MAC Address bit 15~08
MAC Address bit 23~16
MAC Address bit 31~24
EAD1
EAD2
EAD3
EAD4
MAC Address bit 39~32
MAC Address bit 47~40
75H
76H
77H
78H
EAD5
EACSR_2
SCR_1
SCR_2
SCR_3
SCR_4
SCR_5
Ethernet Address Control / Status Register 2 (77H)
Snooping Control Register 1 (78H)
Snooping Control Register 2 (79H)
Snooping Control Register 3 (7AH)
Snooping Control Register 4 (7BH)
Snooping Control Register 5 (7CH)
79H
7AH
7BH
7CH
80H
81H
82H
83H
84H
88H
P_MIB_IDX Per Port MIB counter Index Register
MIB_DAT
MIB_DAT
MIB_DAT
MIB_DAT
P_RX_LEN
PVLAN
TOS_MAP
VLAN_MAP VLAN priority Map Register
MRCMDX
MIB counter Data Register bit 0~7
MIB counter Data Register bit 8~15
MIB counter Data Register bit 16~23
MIB counter Data Register bit 24~31
Per Port RX Packet Length Control Register
Port-based VLAN mapping table registers
TOS Priority Map Register
B0-BFH
C0-CFH
D0-D1H
Memory Data Pre-Fetch Read Command Without Address F0H
Increment Register
MRCMD
MRRL
MRRH
F2H
F4H
F5H
XXH
00H
00H
XXH
Memory Data Read Command With Address Increment Register
Memory Data Read address Register Low Byte
Memory Data Read address Register High Byte
MWCMDX
Memory Data Write Command Without Address Increment F6H
Register
MWCMD
Memory Data Write Command With Address Increment
Register
F8H
XXH
MWRL
MWRH
TXPLL
TXPLH
ISR
Memory Data Write address Register Low Byte
Memory Data Write address Register High Byte
TX Packet Length Low Byte Register
TX Packet Length High Byte Register
Interrupt Status Register
FAH
FBH
FCH
FDH
FEH
00H
00H
XXH
XXH
00H
Preliminarydatasheet
DM9016-13-DS-P01
March 26, 2009
21
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
