DM9010
Single Chip Ethernet Controller with General Processor Interface
2
1
0
PAD_DIS1
CRC_DIS1 PHS0,RW
TXREQ
PHS0,RW PAD Appends Disable for Packet Index 1
CRC Appends Disable for Packet Index 1
PHS0,RW TX Request. Auto clears after sending completely
6.4 TX Status Register I ( 03H ) for packet index I
Bit
Name
Default
Description
7
TJTO
PHS0,RO Transmit Jabber Time Out
It is set to indicate that the transmitted frame is truncated due to more than 2048
bytes are transmitted
6
5
LC
PHS0,RO Loss of Carrier
It is set to indicate the loss of carrier during the frame transmission. It is not valid in
internal Loopback mode
PHS0,RO No Carrier
NC
It is set to indicate that there is no carrier signal during the frame transmission. It is
not valid in internal Loopback mode
4
3
LC
COL
PHS0,RO Late Collision
It is set when a collision occurs after the collision window of 64 bytes
PHS0,RO Collision Packet
It is set to indicate that the collision occurs during transmission
PHS0,RO Excessive Collision
2
EC
It is set to indicate that the transmission is aborted due to 16 excessive collisions
1:0
RESERVED
0,RO
Reserved
6.5 TX Status Register II ( 04H ) for packet index I I
Bit
Name
Default
Description
7
TJTO
PHS0,RO Transmit Jabber Time Out
It is set to indicate that the transmitted frame is truncated due to more than 2048
bytes are transmitted
6
5
4
LC
NC
LC
PHS0,RO Loss of Carrier
It is set to indicate the loss of carrier during the frame transmission. It is not valid in
internal Loopback mode
PHS0,RO No Carrier
It is set to indicate that there is no carrier signal during the frame transmission. It is
not valid in internal Loopback mode
PHS0,RO Late Collision
It is set when a collision occurs after the collision window of 64 bytes
PHS0,RO Collision packet, collision occurs during transmission
PHS0,RO Excessive Collision
3
2
COL
EC
It is set to indicate that the transmission is aborted due to 16 excessive collisions
1:0
RESERVED
0,RO
Reserved
6.6 RX Control Register ( 05H )
Bit
7
6
Name
HASHALL PHS0,RW Filter All address in Hash Table
WTDIS PHS0,RW Watchdog Timer Disable
When set, the Watchdog Timer (2048 bytes) is disabled. Otherwise it is enabled
DIS_LONG PHS0,RW Discard Long Packet
Packet length is over 1522byte
Default
Description
5
Preliminary
18
Version: DM9010-17--DS-P04
Jan. 18, 2006
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
