DM9010
Single Chip Ethernet Controller with General Processor Interface
occurred. This bit will not be affected after a software reset
6.16 Physical Address Register ( 10H~15H )
Bit
7:0
7:0
7:0
7:0
7:0
7:0
Name
PAB5
PAB4
PAB3
PAB2
PAB1
PAB0
Default
E,RW
E,RW
E,RW
E,RW
E,RW
E,RW
Description
Physical Address Byte 5 (15H)
Physical Address Byte 4 (14H)
Physical Address Byte 3 (13H)
Physical Address Byte 2 (12H)
Physical Address Byte 1 (11H)
Physical Address Byte 0 (10H)
6.17 Multicast Address Register ( 16H~1DH )
Bit
7:0
7:0
7:0
7:0
7:0
7:0
7:0
7:0
Name
MAB7
MAB6
MAB5
MAB4
MAB3
MAB2
MAB1
MAB0
Default
X,RW
X,RW
X,RW
X,RW
X,RW
X,RW
X,RW
X,RW
Description
Multicast Address Byte 7 (1DH)
Multicast Address Byte 6 (1CH)
Multicast Address Byte 5 (1BH)
Multicast Address Byte 4 (1AH)
Multicast Address Byte 3 (19H)
Multicast Address Byte 2 (18H)
Multicast Address Byte 1 (17H)
Multicast Address Byte 0 (16H)
6.18 General purpose control Register ( 1EH )
Bit
7
6:4
Name
RESERVED
GPC64
Default
0,RO
PH,
Description
Reserved
General Purpose Control 6~4
111,RO
Define the input/output direction of pins GPIO6~4 respectively.
These bits are all forced to “1”s, so pins GPIO6~4 are output only.
General Purpose Control 3~1
3:1
0
GPC31
GPC0
PH,
000,RW Define the input/output direction of pins GPIO 3~1 respectively.
When a bit is set 1, the direction of correspondent bit of General Purpose Register
is output. Other defaults are input
PH1,RO General Purpose Control 0
This bit define the input/output direction of pin GPIO0.
These bits are forced to “1”, so pin GPIO0 is output only.
Pin GPIO0 is forced to output for internal PHYceiver power down function.
6.19 General purpose Register ( 1FH )
Bit
7
6:4
Name
RESERVED
GEPIO6-4
Default
0,RO
Description
Reserved
PH0,RW General Purpose Data 6~4
These bits are reflect to pin GEPIO6~4 respectively.
PH0,RW General Purpose 3~1
3:1
GEPIO3-1
When the correspondent bit of General Purpose Control Register is 1, the value of
the bit is reflected to pin GEPIO3-1
When the correspondent bit of General Purpose Control Register is 0, the value of
the bit to be read is reflected from correspondent pins of GEPIO3-1
The GEPIOs are mapped to pins GEPIO3 to GEPIO1 respectively
Preliminary
22
Version: DM9010-17--DS-P04
Jan. 18, 2006
DAVICOM [ DAVICOM SEMICONDUCTOR, INC. ]
