59
8Bit Single Chip Microcontroller
DMC73C168
- PLL DATA REGISTER
P18
MSB
0
>0112
P19 >0113
MSB
LSB
1
LSB
/// /// /// ///
0
0
0
1
1
0
0
0
1
0
211
2o
Figure 5-7-10.
2) Pulse Swallow Type
- Frequency dividing number setting range
N = 256 - (216 - 1)
Example : Reception of FM
(Reception frequency : 125MHz, Reference frequency : 25KHz, IF frequency : 10.7MHz)
In case of FM band, 1/2 divider is added to the front stage of prescaler.
(125+10.7) x 106
N =
= 2714 = 16M + S M : 169[10] = 0A9h
S : 10[10] = 0Ah
2 x 25 x 103
= >A9A
- PLL DATA REGISTER
P18
MSB
0
>0112
P19 >0113
LSB
0
MSB
1
LSB
0
0
0
0
1
0
1
0
0
1
1
0
1
M value
S
211
2o 23
2o
Figure 5-7-11.
5.8 IF Counter
The DMC73C168 has on-chip IF counter function to measure FMIF or AMIF frequencies.
The IF counter consists of 17 bits and is mainly used to detect the stop signal during auto search
tuning. If the desired IF frequency is counted by measuring frequencies input to pins PA0/FMIF
and PA1/AMIF during auto search tuning, a broadcast station can be considered to exist on the
reception frequency at that time.
Thus, by using the IF counter function to detect the stop signal, auto search tuning operation can
be accomplished with smaller channel spacings such as 25KHz/step in the FM band 1KHz/step
in the AM band.
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DAEWOO ELECTRONICS CO., LTD.