ES51963
4 1/2 DMM
BufX10 / (reference voltage) = 10 kΩ / (-100 mV)
(6) Digital Interface between ES51963 and Microprocessor
The pins, EOC, SCLK and STATUS of ES51963 are digital communicating interface
between ES51963 and microprocessor. The STATUS is bi-directional, and the others are
unilateral: EOC is from ES51963 to microprocessor and SCLK is from microprocessor to
ES51963. There are two formats for data acquisition. In format 1, ES51963 raise the logic
level of EOC to high at the duration of INT phase and DINT phase. The duration as EOC is
high represents the A-to-D conversion result. As the conversion completes and EOC become
logic low, the microprocessor may send 16 clock pulses to pin SCLK and read out the serial
data (status) on pin STATUS at the falling edge of the clock pulse. The received status
represents the polarity of conversion result and the operation mode of ES51963. The meaning
of each bit of the status received from STAUS is shown in the following table. The
sending/receiving order is S0, S1, … S15.
S15 S14 S13 S12 S11 S10 S9 S8 S7 S6 S5 S4 S3 S2 S1 S0
Sign : "H" is negative, "L" is positive.
Pmax : "H" is maximum peak value. The default is "L".
Pmin : "H" is minimum peak value. The default is "L".
LBATT : low battery detection, "H" is smaller than V12 and "L" is greater than V12
typically. The default is "L".
X10 : "H" is X10 function on. The default is "L".
PEAK : "H" is PEAK Hold function on. The default is "L".
Pcal : "H" is PEAK Hold function in calibration mode. The default is "L".
ZERO : "H" is zero calibration on. The default is "L".
C0~C2 : conversion rate selection. The default is (1, 1, 0).
B0~B2 : buzzer frequency selection. The default is (0, 1, 0).
Format : "L" is format 1, and "H" is format 2. The default is "L".
TEST : "H" is testing mode on. The default is "L".
The communication way between ES51963 and the microprocessor in format 2 is
similar to that of format 1. However in format 2, ES51963 provides the A-to-D conversion
result by a 16-bits output count instead of the duration of EOC. ES51963 raises the logic level
of EOC high at the duration of ZI phase. As the conversion completes and EOC becomes low,
the microprocessor sends 32 clock pulses to pin SCLK and read the values of output count and
10
2003/9/1
CYRUSTEK [ Cyrustek corporation ]
