CY7C68013A/CY7C68014A
CY7C68015A/CY7C68016A
9.8
Slave FIFO Synchronous Write
tIFCLK
IFCLK
tWRH
SLWR
tSWR
DATA
Z
N
Z
tSFD tFDH
FLAGS
tXFLG
[19]
Figure 9-7. Slave FIFO Synchronous Write Timing Diagram
[21]
Table 9-9. Slave FIFO Synchronous Write Parameters with Internally Sourced IFCLK
Parameter
Description
Min.
20.83
18.1
0
Max.
Unit
ns
t
t
t
t
t
t
IFCLK Period
IFCLK
SLWR to Clock Set-up Time
ns
SWR
WRH
SFD
Clock to SLWR Hold Time
ns
FIFO Data to Clock Set-up Time
Clock to FIFO Data Hold Time
Clock to FLAGS Output Propagation Time
9.2
0
ns
ns
FDH
9.5
ns
XFLG
[21]
Table 9-10. Slave FIFO Synchronous Write Parameters with Externally Sourced IFCLK
Parameter
Description
Min.
20.83
12.1
3.6
Max.
Unit
ns
t
t
t
t
t
t
IFCLK Period
200
IFCLK
SLWR to Clock Set-up Time
ns
SWR
WRH
SFD
Clock to SLWR Hold Time
ns
FIFO Data to Clock Set-up Time
Clock to FIFO Data Hold Time
Clock to FLAGS Output Propagation Time
3.2
ns
4.5
ns
FDH
13.5
ns
XFLG
Document #: 38-08032 Rev. *G
Page 42 of 55