CY7C68013A/CY7C68014A
CY7C68015A/CY7C68016A
that needs attention while using the PKTEND to commit a one
byte/word packet. There is an additional timing requirement
that need to be met when the FIFO is configured to operate in
auto mode and it is desired to send two packets back to back:
a full packet (full defined as the number of bytes in the FIFO
meeting the level set in AUTOINLEN register) committed
automatically followed by a short one byte/word packet
committed manually using the PKTEND pin. In this particular
scenario, user must make sure to assert PKTEND atleast one
clock cycle after the rising edge that caused the last byte/word
to be clocked into the previous auto committed packet. Figure
9-10 below shows this scenario. X is the value the
AUTOINLEN register is set to when the IN endpoint is
configured to be in auto mode.
t
IFCLK
IFCLK
t
t
SFA
FAH
FIFOADR
>= t
WRH
>= t
SWR
SLWR
DATA
t
t
FDH
t
t
t
FDH
t
SFD
t
t
t
FDH
t
t
t
SFD
FDH
SFD
FDH
SFD
SFD
SFD
FDH
X-4
X-2
X-1
1
X-3
X
At least one IFCLK cycle
t
SPE
t
PEH
PKTEND
Figure 9-10. Slave FIFO Synchronous Write Sequence and Timing Diagram
The above figure shows a scenario where two packets are
being committed. The first packet gets comitted automatically
when the number of bytes in the FIFO reaches X (value set in
AUTOINLEN register) and the second one byte/word short
packet being committed manually using PKTEND. Note that
there is atleast one IFCLK cycle timing between the assertion
of PKTEND and clocking of the last byte of the previous packet
(causing the packet to be committed automatically). Failing to
adhere to this timing, will result in the FX2 failing to send the
one byte/word short packet.
9.11
Slave FIFO Asynchronous Packet End Strobe
tPEpwh
PKTEND
tPEpwl
FLAGS
tXFLG
[19]
Figure 9-11. Slave FIFO Asynchronous Packet End Strobe Timing Diagram
[23]
Table 9-14. Slave FIFO Asynchronous Packet End Strobe Parameters
Parameter Description
PKTEND Pulse Width LOW
Min.
50
Max.
Unit
ns
t
t
t
PEpwl
PKTEND Pulse Width HIGH
50
ns
PWpwh
XFLG
PKTEND to FLAGS Output Propagation Delay
115
ns
Document #: 38-08032 Rev. *G
Page 44 of 55
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