PRELIMINARY
CYW54907
17.1.4 RMII Transmit Packet Timing
Figure 19 and Table 43 provide the RMII transmit packet timing.
Figure 19. RMII Transmit Packet Timing
REF_CLK
TX_EN
TXD[1]
TXD[0]
0
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1
1
X
X
X
X
X
X
X
X
X
X
X
X
0
0
Preamble
SFD
Data
Table 43. RMII Transmit Packet Timing Parameters
Parameter
REF_CLK Cycle Time
Symbol
Minimum
Typical
Maximum
Unit
ns
–
–
4
2
20
–
–
–
–
TXEN, TXER, TXD[1:0] setup time to REF_CLK rising
TXEN, TXER, TXD[1:0] hold time from REF_CLK rising
Notes:
TXEN_SETUP
TXEN_HOLD
ns
–
ns
1. TXD[1:0] provides valid data for each REF_CLK period while TX_EN is asserted.
2. In 10 Mbps mode, there are ten REF_CLK periods per data period.
Document Number: 002-19312 Rev. *C
Page 74 of 95
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