PRELIMINARY
CYW54907
16. System Power Consumption
Note: Values in this data sheet are design goals and are subject to change based on the results of device characterization.
Note: Unless otherwise stated, these values apply for the conditions specified in Table 18: “Recommended Operating Conditions and
DC Characteristics”.
16.1 WLAN Current Consumption
The tables in this subsection show the typical, total current used by the CYW54907. Current values may be measured with the APPS
core powered off. The first column of the table, the mode description, will state the power condition of the APPS core.
16.1.1 2.4 GHz Mode
Table 38. 2.4 GHz Mode WLAN Current Consumption
VDDIO =
VBAT = 3.6V a
Mode
VDDIO_HIB = 3.3V a, b, c
(µA)
(µA)
Sleep Modes
Radio off d
Sleep e, f
3
6
3
160
160
160
160
IEEE Power Save, DTIM=1, single RX, APPS powered down g
IEEE Power Save, DTIM=3, single RX, APPS powered down h
IEEE Power Save, DTIM=9, single RX, APPS powered down
2180
680
233
Active Modes
Continuous RX mode MCS7, HT20, 1SS, APPS powered up i, j
CRS-HT20, APPS powered up k
Continuous TX mode 1 Mbps, APPS powered up l
Continuous TX mode MCS7, HT20, 1SS, APPS powered up m
57,200
55,200
60
60
60
60
325,000
302,000
Ping Modes
Ping to associated access point l
Sleep
336,000
6
60
160
a. Typical silicon.
b. VIO is specified with all pins idle (not switching) and not driving any loads.
c. Excludes VDDIO_USB, VDDIO_RMII, VDDIO_I2S, and VDDIO_SD.
d. REG_ON is low or the device is in hibernation, and all supplies are present.
e. REG_ON is high. APPS domain is powered down. WLAN domain is in low-power state retention mode. Top level is powered up.
f. Inter-beacon current.
g. Beacon Interval = 102.4 ms. Beacon duration = 1 ms @ 1 Mbps. Average current over 3× DTIM intervals.
h. Beacon interval = 307.2 ms. Beacon duration = 1 ms @ 1 Mbps. Average current over 3× DTIM intervals.
i. Duty cycle is 100%. Carrier sense (CS) detect/packet receive.
j. Measured using packet engine test mode.
k. Carrier sense (CCA) when no carrier present.
l. Duty cycle is 100%. TX power at chip output ~17.7 dBm.
m.Duty cycle is 100%. TX power at chip output ~15.2 dBm.
Document Number: 002-19312 Rev. *C
Page 70 of 95
CYPRESS [ CYPRESS ]
