PRELIMINARY
CYW54907
15.5 BBPLL LDO
Table 37. BBPLL LDO Specifications
Parameter
Conditions and Comments
Min.
Typ.
Max.
Units
Input supply voltage, Vin
Min. Vin= Vo + 0.15V = 1.35V (for Vo = 1.2V).
1.3
1.35
1.5
V
The dropout voltage requirement must be met under
maximum load.
Output voltage, Vo
Dropout voltage
Programmable in 25 mV steps. Default = 1.2V.
At max. load
1.1
–
1.2
–
1.275
150
+4
V
mV
%
Output voltage DC accuracy
Output current
Includes line/load regulation.
Peak load = 80 mA, average = 35 mA
No load
–4
0.1
–
–
–
55
mA
µA
Quiescent current
10
550
–
12
55 mA load
–
570
5
µA
Line regulation
Load regulation
Leakage current
V
in from (Vo + 0.15V) to 1.5V; 200 mA load
–
mV/V
load from 1mA to 200 mA; Vin ≥ (Vo + 0.15V)
Powered down. Junction temperature is 85°C.
Bypass mode
–
0.025 0.045 mV/mA
–
5
0.2
–
20
1.5
–
µA
µA
dB
us
–
PSRR
@1 kHz, Vin ≥ Vo + 0.15V, Co = 4.7 µF
20
–
Start-up time of PMU
VIO up and steady. Time from REG_ON rising edge to CLDO
reaching 99% of Vo.
530
700
LDO turn-on time
The LDO turn-on time when the rest of the chip is up.
Vin=Vo+0.15V to 1.5V, Co=0.47uF, no load
–
–
140
60
180
70
–
us
mA
µF
µF
Inrush current
External output capacitor, Co
External input capacitor
Ceramic, X5R, size 0201, max. 6.3V, 20% tolerance
0.27
–
0.47
1
Only use an external input capacitor at the LDO_VDD1P5
pin if it is not supplied from the CBUCK output.
–
Document Number: 002-19312 Rev. *C
Page 69 of 95
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