PRELIMINARY
CYW54907
15.2 3.3V LDO (LDO3P3)
Table 34. LDO3P3 Specifications
Specification
Notes
Min.
Typ.
Max.
Units
Input supply voltage, Vin
Min. = Vo + 0.2V = 3.5V dropout voltage requirement
must be met under maximum load for performance
specifications.
3.0
3.6
4.8a
V
Output current
–
0.001
–
3.3
–
450
–
mA
V
Nominal output voltage, Vo
Dropout voltage
Output voltage DC accuracy
Quiescent current
Line regulation
Default = 3.3V.
At max. load.
–
–
200
+5
85
3.5
0.3
–
mV
Includes line/load regulation.
No load.
–5
–
–
%
–
µA
V
in from (Vo + 0.2V) to 4.8V, max. load.
–
–
mV/V
mV/mA
dB
Load regulation
Load from 1 mA to 450 mA.
–
–
PSRR
V
in ≥ Vo + 0.2V, Vo = 3.3V, Co = 4.7 µF,
20
–
Max load, 100 Hz to 100 kHz.
LDO turn-on time
Chip already powered up.
–
1.0b
160
4.7
250
10
µs
µF
External output capacitor, Co
Ceramic, X5R, 0402, (ESR: 5 mΩ–240 mΩ),
± 10%, 10V.
External input capacitor
For LDO_VDDBAT5V pin (shared with band gap)
ceramic, X5R, 0402, (ESR: 30mΩ–200 mΩ), ± 10%,
10V. Not needed if sharing 4.7 µF VBAT capacitor
with SR_VDDBAT5V.
–
4.7
–
µF
a. The maximum continuous voltage is 4.8V. Voltages up to 6.0V for up to 10 seconds, cumulative duration, over the lifetime of the device are
allowed. Voltages as high as 5.0V for up to 250 seconds, cumulative duration, over the lifetime of the device are allowed.
b. Minimum capacitor value refers to the residual capacitor value after taking into account the part-to-part tolerance, DC-bias, temperature, and
aging.
Document Number: 002-19312 Rev. *C
Page 66 of 95
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