CYW43362
Table 9. WLBGA Signal Descriptions (Cont.)
Ball # Signal Name Type
Description
GPIO Interface
E4
E5
GPIO_0
I/O
This pin is used as a strapping option to select between SDIO mode (pull low)
or SPI mode (pull high). It is strongly recommended to use GPIO_0 only as a
host bus interface select. This pin has a weak internal pull-down resistor.
GPIO_1/BTCX_FREQ
I/O
General-purpose interface pin. This pin is high impedance on power-up and
reset. Subsequently, it becomes an input or output through software control.
This pin has a programmable weak pull-up/down. This GPIO can be used as the
out-of-band WLAN_IRQ signal for SDIO/SPI. This pin can also be programmed
via software to behave as the BTCX_FREQ coexistence signal.
H5
J6
J7
BTCX_TXCONF/GPIO_3
BTCX_STATUS/GPIO_4
BTCX_RF_ACTIVE/GPIO_5
–
–
–
Multiplexed BT_Coex/GPIO pins. When programmed as GPIOs, pins are high
impedance on power-up and reset. Subsequently, they can be individually
programmed to become inputs or outputs through software control. They can
also be programmed to have internal pull-up or pull-down resistors.
Only GPIO 1, 3, 4, and 5 (total 4) can be used as GPIOs.
GPIO drive strength:
For 1.8V: 1.0 mA
For 2.5V: 2.5 mA
For 3.3V: 3.0 mA
Output slewing can be enabled or disabled by software; it is enabled by default.
Note:
The following is a list of the internal pull-up/pull-down resistor strengths for the default strapping options described in the GPIO section
above:
Minimum
Typical
Maximum
–
–
pup @ 1.8V
pdn @ 1.8V
40K
39K
59K
58K
70K
67K
–
–
pup @ 2.5V
pdn @ 2.5V
40K
39K
58K
58K
69K
67K
–
–
pup @ 3.3V
pdn @ 3.3V
39K
39K
58K
58K
69K
67K
Miscellaneous Signals
J4
WL_RST_N
I
Active low WLAN reset signal. Includes an internal 200 kΩ pull-down resistor.
Within 1.5 ms of WL_RST_N being driven high, the PMU changes this from PD
to High-Z. Software can optionally enable the pull-down resistor.
VIH = 1.08V to 3.6V. VIL < 0.4V.
H5
E5
BTCX_TXCONF/GPIO_3
GPIO_1/BTCX_FREQ
O
I
Coexistence output giving Bluetooth permission to transmit. This pin is muxed
and can be changed to a GPIO via software.
By default, this pin behaves as a GPIO. However, it can be programmed via
software to behave as a coexistence signal that indicates that the coexisting BT
is about to transmit on a restricted channel.
J6
J7
BTCX_STATUS/GPIO_4
I
I
Coexistence signal indicating Bluetooth priority status and TX/RX direction. This
pin is muxed and can be changed to a GPIO via software.
BTCX_RF_ACTIVE/GPIO_5
Coexistence signal indicating that Bluetooth is active. This pin is muxed and can
be changed to a GPIO via software.
Note: The above Bluetooth coexistence and GPIO signals have keepers that prevent them from floating when they aren’t
connected; however, when they are connected to another component, prevention from floating can’t be assured by the
keepers.
Integrated Voltage Regulators
H1
VOUT_3P3
O
O
I
3.3V low noise LDO output (40 mA)
1.2V output for low noise LDO1, 150 mA
Battery voltage input for CBUCK
K3
VOUT_LNLDO1
SR_VDDBAT1
SR_VDDBAT2
J1, K1
J2
I
Battery voltage input for band gap and LDOP3
Document No. 002-14779 Rev. *G
Page 36 of 60
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