CYW43362
Table 9. WLBGA Signal Descriptions (Cont.)
Ball # Signal Name Type
Description
J3
EXT_SMPS_REQ
I
Internal 200 kΩ pull-down resistor included.
VIH = 1.08V to 3.6V, and VIL < 0.4V.
Note: Driving this input high sets CBUCK to External mode, but it does
not power down the rest of the PMU. The PMU powers down when
WL_RST_N is low.
Note: This pin is only used if the CYW43362 switching regulator is also
used to power an external device. This pin should be connected to
ground for applications that do not use this feature.
K4
EXT_PWM_REQ
I
Driving this input high forces CBUCK into PWM mode. Internal 200 kΩ pull-
down resistor included.
VIH = 1.08V to 3.6V, and VIL < 0.4V.
Note: This pin is only used if the CYW43362 switching regulator is also
used to power an external device. This pin should be connected to
ground for applications that do not use this feature.
L1
L3
SR_VLX
O
I
Core buck regulator: output to inductor
VDD_LDO
Input supply pin for CLDO and LNLDO1 (also acts as the voltage feedback for
CBUCK).
L4
VOUT_CLDO
O
1.2V output from the core LDO, 150 mA
Document No. 002-14779 Rev. *G
Page 37 of 60
CYPRESS [ CYPRESS ]
