CYW43362
8.3 Wireless Configuration Utility
The device driver that supports the Cypress IEEE 802.11 family of wireless solutions provides an input/output control (IOCTL) interface for making advanced configuration
settings. The IOCTL interface makes it possible to make settings that are normally not possible when using just the native operating system-specific IEEE 802.11 configura-
tion mechanisms. The utility uses IOCTLs to query or set a number of different driver/chip operating properties.
9. Pinout and Signal Descriptions
9.1 Signal Assignments
Figure 22 shows the 69-Ball WLBGA ball map.
Table 9 on page 33 shows the WLBGA signal descriptions.
Figure 22. 69-Ball WLBGA Ball Map
A
B
C
D
E
F
G
H
J
K
L
1
2
WRF_RFIN
WRF_RFOUT
#N/A
WRF_PA_VDD
RF_SW_CTRL_0
RF_SW_CTRL_1
VDDIO_RF
VOUT_3P3
SR_VDDBAT1
SR_VDDBAT1
SR_VLX
1
2
#N/A
WRF_PA_GND
#N/A
WRF_PA_GND
WRF_PADRV_VDD
WRF_ANA_GND
WRF_PADRV_GND
RF_SW_CTRL_3
RF_SW_CTRL_2
VDD
SR_VDDBAT2
EXT_SMPS_REQ
WL_RST_N
PMU_AVSS
VOUT_LNLDO1
EXT_PWM_REQ
SR_PVSS
3
4
WRF_LNA_VDD1P2
WRF_LNA_GND
#N/A
#N/A
VSS
VSS
VSS
VSS
VSS
VDD
VDD_LDO
3
4
WRF_ANA_VDD1P2
WRF_GPIO_OUT
GPIO_0
VDDIO
VOUT_CLDO
BTCX_TXCONF/
GPIO_3
5
WRF_VCO_LDO_IN_VDD1P8
WRF_VCO_GND
#N/A
#N/A
WRF_VCO_LDO_OUT_VDD1P2
WRF_XTAL_GND
WRF_RES_EXT
OSCOUT
GPIO_1 / BTCX_FREQ
WRF_AFE_GND
SDIO_DATA_2
XTAL_PU
JTAG_TDO
JTAG_TMS
EXT_SLEEP_CLK
VDDIO_SD
SDIO_DATA_1
SDIO_DATA_0
5
BTCX_STATUS/
GPIO_4
BTCX_RF_ACTIVE/
GPIO_5
6
7
JTAG_TDI
SDIO_DATA_3
6
7
WRF_TCXO_IN
WRF_TCXO_VDD3P3
WRF_XTAL_VDD1P2
OSCIN
#N/A
WRF_AFE_VDD1P2
JTAG_TRST_L
JTAG_TCK
SDIO_CMD
SDIO_CLK
A
B
C
D
E
F
G
H
J
K
L
Document No. 002-14779 Rev. *G
Page 32 of 146
CYPRESS [ CYPRESS ]
