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CX25870 参数 Datasheet PDF下载

CX25870图片预览
型号: CX25870
PDF下载: 下载PDF文件 查看货源
内容描述: 视频编码器与自适应闪烁过滤和HDTV输出 [Video Encoder with Adaptive Flicker Filtering and HDTV Output]
分类和应用: 电视编码器
文件页数/大小: 291 页 / 3791 K
品牌: CONEXANT [ CONEXANT SYSTEMS, INC ]
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CX25870/871  
2.0 Internal Registers  
Flicker-Free Video Encoder with Ultrascale Technology  
2.4 Reading Registers  
Table 2-5. Programming Detail For All Read/Write Registers (11 of 16)  
Bit/Register  
Names  
Bit Location  
Bit 3–C6  
Bit/Register Definition  
0 = Configures the encoder to send/receive an active low HSYNC* digital signal  
HSYNCI  
(DEFAULT)  
1 = Configures the encoder to send/receive an active high HSYNC* digital signal.  
HSYNOFFSET[9:8]  
HSYNOFFSET[7:0]  
Bits [7:6]–70 and A 2s-complement number. The values range from –512 pixels to +511 pixels. This  
bits [7:0]–6E  
register manipulates the falling edge position of the digital HSYNC* output from the  
CX25870/871. The default value is 0 and denotes the standard position of the HSYNC*  
leading edge. This register is only effective in master interface.  
HSYNWIDTH[5:0]  
Bits [5:0]–70  
Controls the duration/width of the digital HSYNC output pulse. Value will be hexadecimal  
and its units are in terms of pixels. A value of 0 is a disallowed condition. The acceptable  
range is 0x02 pixels to 0x3F pixels (=63 decimal). The default value is 0x02. Never set to  
0. This register is only effective in master interface.  
HUE_ADJ[7:0]  
Bits [7:0]–5C  
Adjust the color subcarrier phase during the video active region. Increasing this value by  
1 unit has the effect of increasing the phase by (360/256) = 1.406 degrees.  
IN_MODE[3] and  
IN_MODE[2:0]  
Bit 3–32 and bits This bit is used in conjunction with IN_MODE[2:0] to configure the encoder to receive a  
[2:0]–C6  
desired input pixel format. Format of input pixels when IN_MODE[3] = 0 (MSb of this  
4-bit sequence):  
0000 = 24-bit RGB multiplexed  
0001 = 16-bit RGB multiplexed  
0010 = 15-bit RGB multiplexed  
0011 = 24-bit RGB nonmultiplexed  
0100 = 24-bit YCrCb multiplexed  
0101 = 16-bit YCrCb multiplexed  
0110 = Alternate 16-bit YCrCb multiplexed  
0111 = 24-bit YCrCb nonmultiplexed  
Format of input pixels when IN_MODE[3] = 1(MSb of this 4-bit sequence):  
1000 = Alternate 24-bit RGB multiplexed  
1001 = Reserved  
1010 = Alternate 16-bit RGB nonmultiplexed  
1011 = Alternate 24-bit RGB nonmultiplexed  
1100 = Alternate 24-bit YCrCb multiplexed  
1101 = Reserved  
1110 = Alternate 16-bit YCrCb nonmultiplexed  
1111 = Alternate 24-bit YCrCb nonmultiplexed  
LUMADLY[1:0]  
Bits [1:0]–D6  
Used to program the luminance delay in pixels for the CVBS_DLY and Y_DLY output  
modes.  
00 = No delay (DEFAULT)  
01 = 1 pixel  
10 = 2 pixels  
11 = 3 pixels  
MCB[7:0]  
Bits [7:0]–AA  
Bits [7:0]–3E  
Multiplication factor for Cb (or B-Y) component prior to subcarrier modulation.  
MCOMPU[7:0]  
Multiplication factor for component video U output.  
Value 0x80 (DEFAULT) represents 1.0 scale factor.  
MCOMPV[7:0]  
MCOMPY[7:0]  
MCR[7:0]  
Bits [7:0]–40  
Bits [7:0]–3C  
Bits [7:0]–A8  
Multiplication factor for component video V output.  
Value 0x80 (DEFAULT) represents 1.0 scale factor.  
Multiplication factor for component video Y output.  
Value 0x80 (DEFAULT) represents 1.0. scale factor.  
Multiplication factor for Cr (or R-Y) component prior to subcarrier modulation.  
100381B  
Conexant  
2-19  
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