CS2000-OTP
5.4.7
Ratio Configuration Summary
The R is the user defined ratio for which up to four different values (Ratio ) can be stored in the one
UD
0-3
time programmable memory. The M[1:0] pins or LockClk[1:0] modal parameter then select the user de-
fined ratio to be used (depending on if static or dynamic ratio mode is to be used). The resolution for the
R
is selectable for the dynamic ratio mode. R-Mods can be applied to both modes whereas Auto R-Mod
UD
is only available in dynamic mode. The user defined ratio, ratio modifier, and automatic ratio modifier
make up the effective ratio R , the final calculation used to determine the output to input clock ratio. The
EFF
effective ratio is then corrected for the internal dividers. The frequency synthesizer’s fractional-N source
selection is made between the static ratio (in frequency synthesizer mode) or the dynamic ratio generated
from the digital PLL (in Hybrid PLL mode) by either the FracNSrc modal parameter for manual mode or
the presence of CLK_IN in automatic mode. The conceptual diagram in Figure 12 summarizes the fea-
tures involved in the calculation of the ratio values used to generate the fractional-N value which controls
the Frequency Synthesizer. The subscript ‘4’ indicates the modal parameters.
M2 pin force Manual
or
Timing Reference Clock
(XTI/REF_CLK)
M[1:0] pins =? LockClk[1:0]
Auto Selection
(CLK_IN sense)
≠
Divide
RefClkDiv[1:0]
Effective Ratio REFF
M[1:0] pins
Manual Selection
(FracNSrc4 or M2 pin)
M2 pin
RModSel[1:0]4
=
User Defined Ratio RUD
Frequency
Synthesizer
PLL Output
RefClkDiv[1:0]
Ratio 0
Ratio 1
Ratio 2
Ratio 3
SysClk
Ratio Format
Static Ratio
12.20
only
Ratio
Modifier
R Correction
N
Dynamic Ratio
12.20
20.12
Ratio
Modifier
Auto
R-Mod
Digital PLL &
Fractional N Logic
R Correction
LFRatioCfg
Frequency Reference Clock
(CLK_IN)
AutoRMod4
or M2 pin
LockClk[1:0]4
FsDet[1:0]
Figure 12. Ratio Feature Summary
Referenced Control
Parameter Definition
Ratio 0-3................................“Ratio 0 - 3” on page 24
M[1:0] pins.............................“M1 and M0 Mode Pin Functionality” on page 20
LockClk[1:0] ..........................“Lock Clock Ratio (LockClk[1:0])” section on page 24
LFRatioCfg............................“Low-Frequency Ratio Configuration (LFRatioCfg)” on page 26
RModSel[1:0] ........................“R-Mod Selection (RModSel[1:0])” section on page 23
AutoRMod .............................“Auto R-Modifier Enable (AutoRMod)” on page 24
RefClkDiv[1:0] .......................“Reference Clock Input Divider (RefClkDiv[1:0])” on page 25
FracNSrc...............................“Fractional-N Source for Frequency Synthesizer (FracNSrc)” section on page 24
18
DS758PP1
CIRRUS [ CIRRUS LOGIC ]
