50S116T
SDRAM
Operating Timing Example, continued
Auto Precharge Timing (Read Cycle)
0
1
2
3
4
5
6
7
8
9
10
11
(1) CAS Latency=2
( a ) burst length = 1
Command
AP
Read
Act
tRP
DQ
Q0
( b ) burst length = 2
Command
Read
Read
Read
AP
Q0
Act
tRP
DQ
Q1
( c ) burst length = 4
Command
AP
Q2
Act
Q4
tRP
DQ
Q0
Q0
Q1
Q1
Q3
( d ) burst length = 8
Command
AP
Q6
Act
tRP
DQ
Q5
Q7
Q2
Act
Q3
(2) CAS Latency=3
( a ) burst length = 1
Command
Read
Read
Read
Read
AP
tRP
DQ
Q0
Q0
Q0
Q0
( b ) burst length = 2
Command
AP
Act
tRP
DQ
Q1
AP
Q1
( c ) burst length = 4
Command
Act
Q4
tRP
DQ
Q2
Q2
Q3
Q3
( d ) burst length = 8
Command
AP
Q5
Act
tRP
DQ
Q1
Q6
Q7
Note:
represents the Read with Auto precharge command.
represents the start of internal precharging.
represents the Bank Activate command.
Read
AP
Act
When the Auto precharge command is asserted, the period from Bank Activate command to
the start of internal precgarging must be at least tRAS(min).
* All specs and applications shown above subject to change without prior notice.
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Rev 1.0 Aug.20,2002
Page 35 of 42
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