50S116T
SDRAM
Operating Timing Example, continued
Power-down Mode
(CLK = 100 MHz)
7
8
11
12
13
14
15
16
17
18
19
20
21
22
23
1
2
3
4
5
6
9
10
0
CLK
CS
RAS
CAS
WE
BA
A10
RAa
RAa
RAa
A0-A9
DQM
CAa
RAa
CAx
tSB
tSB
CKE
DQ
tCKS
tCKS
tCKS
tCKS
ax0
ax2
ax3
ax1
NOP
Active
Precharge
NOPActive
Read
Precharge Standby
Power Down mode
Active Standby
Power Down mode
Note: The PowerDown Mode is entered by asserting CKE "low".
All Input/Output buffers (except CKE buffers) are turned off in the PowerDown mode.
When CKE goes high, command input must be No operation at next CLK rising edge.
* All specs and applications shown above subject to change without prior notice.
1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN, R.O.C
Tel:886-3-3214525
Email: server@ceramate.com.tw
Http: www.ceramate.com.tw
Rev 1.0 Aug.20,2002
Page 34 of 42
Fax:886-3-3521052
CERAMATE [ CERAMATE TECHNICAL ]
