50S116T
SDRAM
Operating Timing Example, continued
Auto Precharge Write (Burst Length = 4)
(CLK = 100 MHz)
6
7
8
11
12
13
14
15
16
17
18
19
20
21
22
23
1
2
3
4
5
9
10
0
CLK
CS
tRC
tRC
RAS
CAS
tRAS
tRP
tRAS
tRP
WE
BS0
BS1
tRCD
tRCD
RAa
RAa
RAb
RAc
A10
A0-A9,
A11
CAw
RAb
CAx
RAc
DQM
CKE
DQ
bx0
aw1 aw2
bx1
bx3
aw0
aw3
bx2
Active
Bank #0
Bank #1
Write
Active
Write
Active
AP*
AP*
* AP is the internal precharge start timing
* All specs and applications shown above subject to change without prior notice.
1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN, R.O.C
Tel:886-3-3214525
Email: server@ceramate.com.tw
Http: www.ceramate.com.tw
Rev 1.0 Aug.20,2002
Page 30 of 42
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