50S116T
SDRAM
Operating Timing Example, continued
Interleaved Bank Read (Burst Length = 8, CAS Latency = 3, Auto Precharge)
(CLK = 100 MHz)
1
2
3
4
5
6
7
8
9
10 11 12 13 14
15 16 17 18 19
20 21 22 23
0
CLK
CS
tRC
tRC
RAS
tRAS
tRP
tRAS
tRAS
tRP
CAS
WE
BA
tRCD
tRCD
tRCD
A10
RBb
RAc
RAc
RAa
RAa
CAz
CAx
A0-A9
DQM
RBb
CBy
CKE
DQ
tCAC
tCAC
tCAC
ax3
ax4
ax0
ax2
ax5
ax6
ax7
by0
by1
by4
by5
by6
ax1
CZ0
tRRD
tRRD
AP*
Read
Active
Bank #0 Active
Bank #1
Read
Read
Active
AP*
* AP is the internal precharge start timing
* All specs and applications shown above subject to change without prior notice.
1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN, R.O.C
Tel:886-3-3214525
Email: server@ceramate.com.tw
Http: www.ceramate.com.tw
Rev 1.0 Aug.20,2002
Page 24 of 42
Fax:886-3-3521052
CERAMATE [ CERAMATE TECHNICAL ]
