50S116T
SDRAM
Operating Timing Example, continued
Interleaved Bank Read (Burst Length = 4, CAS Latency = 3, Auto Precharge)
(CLK = 100 MHz)
11
12
13
14
15
16
17
18
19
20
21
22
23
0
1
2
3
4
5
6
7
8
9
10
CLK
CS
tRC
tRC
tRC
tRC
RAS
tRAS
tRP
tRAS
tRAS
tRP
tRP
tRAS
CAS
WE
BA
tRCD
tRCD
tRCD
tRCD
RAe
RAe
RBd
RAa
RBb
RAc
A10
A0-A9
DQM
CKE
CBz
RAa
CAw
CAy
CBx
RBb
RAc
RBd
tAC
tAC
tAC
tAC
DQ
aw0
aw1 aw2
aw3
bx0
bx1
bx2
bx3
cy0
cy1
cy2
cy3
dz0
tRRD
tRRD
tRRD
tRRD
Read
AP*
Active
AP*
Read
Active
Active
AP*
Active
Bank #0
Bank #1
Read
Read
Active
* AP is the internal precharge start timing
* All specs and applications shown above subject to change without prior notice.
1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN, R.O.C
Tel:886-3-3214525
Email: server@ceramate.com.tw
Http: www.ceramate.com.tw
Rev 1.0 Aug.20,2002
Page 22 of 42
Fax:886-3-3521052
CERAMATE [ CERAMATE TECHNICAL ]
