SDRAM
AS4SD4M16
Austin Semiconductor, Inc.
Upon completion of a burst, assuming no other
READs
commands have been initiated, the DQs will go High-Z. A
full-page burst will continue until terminated. (At the end of the
page, it will wrap to column 0 and continue.)
READ bursts are initiated with a READ command, as shown in
Figure 5.
The starting column and bank addresses are provided
with the READ command, and AUTO PRECHARGE is either
enabled or disabled for that burst access. If AUTO PRECHARGE
is enabled, the row being accessed is precharged at the comple-
tion of the burst. For the generic READ commands used in the
following illustrations, AUTO PRECHARGE is disabled.
During READ bursts, the valid data-out element from
the starting column address will be available following the CAS
latency after the READ command. Each subsequent data-out
element will be valid by the next positive clock edge. Figure 6
shows general timing for each possible CAS latency setting.
Data from any READ burst may be truncated with a
subsequent READ command, and data from a fixed-length READ
burst may be immediately followed by data from a READ
command. In either case, a continuous flow of data can be
maintained. The first data element from the new burst follows
either the last element of a completed burst or the last desired
data element of alonger burst which is being truncated. The
new READ command should be issued x cycles before the clock
edge at which the last desired data element is valid, where x
equals the CAS latency minus one.
T0
T2
T1
T3
CLK
CLK
NOP
HIGH
CKE
COMMAND
NOP
READ
t
t
OH
DOUT
LZ
CS\
RAS\
CAS\
WE\
t
DQ
AC
CAS Latency = 2
T0
T1
T2
T3
T4
A0-A7: x16
COLUMN ADDRESS
CLK
A8, A9, A11: x16
NOP
NOP
COMMAND
READ
NOP
t
ENABLE AUTO PRECHARGE
t
OH
A10
LZ
DISABLE AUTO PRECHARGE
DOUT
t
AC
DQ
BANK ADDRESS
BA0, 1
CAS Latency = 3
DON’T CARE
UNDEFINED
Figure 5
READ COMMAND
Figure 6
CAS LATENCY
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AS4SD4M16
Rev. 1.5 10/01
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