SDRAM
AS4SD4M16
Austin Semiconductor, Inc.
SELF REFRESH
(Industrial -40°C to +85°C Only)
BURSTTERMINATE
The BURST TERMINATE command is used to trun-
cate either fixed-length or full-page bursts. The most recently
registered READ or WRITE command prior to the BURST TER-
MINATE command will be truncated, as shown in the Opera-
tion section of this data sheet.
The SELF REFRESH command can be used to retain
data in the SDRAM, even if the rest of the system is powered
down. When in the self refresh mode, the SDRAM retains data
without external clocking. The SELF REFRESH command is
initiated like an AUTO REFRESH command except CKE is
disabled (LOW).
Once the SELF REFRESH command is registered, all
the inputs to the SDRAM become “Don’t Care,” with the
exception of CKE, which must remain LOW.
Once self refresh mode is engaged, the SDRAM
provides its own internal clocking, causing it to perform its own
AUTO REFRESH cycles. The SDRAM must remain in self
refresh mode for a minimum period equal to tRAS and may
remain in self refresh mode for an indefinite period beyond that.
The procedure for exiting self refresh requires a
AUTO REFRESH
AUTO REFRESH is used during normal operation of
the SDRAM and is analagous to CAS\-BEFORE-RAS\ (CBR)
REFRESH in conventional DRAMs. This command is non-
persistent, so it must be issued each time a refresh is required.
The addressing is generated by the internal refresh
controller. This makes the address bits “Don’t Care” during an
AUTO REFRESH command. The 64Mb SDRAM requires 4,096
AUTO REFRESH cycles every 64ms *(tREF), regardless of width
option. Providing a distributed AUTO REFRESH command
every 15.625µs/3.906µs will meet the refresh requirement and
ensure that each row is refreshed. Alternatively, 4,096 AUTO
REFRESH commands can be issued in a burst at the minimum
sequence of commands. First, CLK must be stable prior to CKE
going back HIGH. Once CKE is HIGH, the SDRAM must have
NOP commands issued (a minimum of two clocks) for tXSR
because time is required for the completion of any internal
refresh in progress.
,
cycle rate (tRC), once every 64ms/ 16ms.
If during normal operation AUTO REFRESH cycles
are issued in bursts (as opposed to being evenly distributed),
a burst of 4,096 AUTO REFRESH cycles should be completed
just prior to entering and just after exiting the self refresh mode.
The self refresh option is not available for the -55° to
+125° screening option.
*64ms for -40° to +85° C ( Industrial Temperatures) and 16ms for -55° to +125°C (Military Temperatures)
Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.
AS4SD4M16
Rev. 1.5 10/01
11
AUSTIN [ AUSTIN SEMICONDUCTOR ]
