AT89C5132
Bit
Bit
Number
Mnemonic Description
Reserved
The values read from these Bits are always 0. Do not set these Bits.
7-6
5
-
Wake up CPU Interrupt Enable Bit
EWUPCPU Set to enable the Wake Up CPU interrupt.
Clear to disable the Wake Up CPU interrupt.
End Of Reset Interrupt Enable Bit
EEOFINT Set to enable the End Of Reset interrupt. This bit is set after reset.
Clear to disable End Of Reset interrupt.
4
Start Of Frame Interrupt Enable Bit
ESOFINT Set to enable the SOF interrupt.
Clear to disable the SOF interrupt.
3
2-1
0
Reserved
The values read from these Bits are always 0. Do not set these Bits.
-
Suspend Interrupt Enable Bit
ESPINT
Set to enable Suspend interrupt.
Clear to disable Suspend interrupt.
Reset Value = 0001 0000b
Table 60. UEPNUM Register
UEPNUM (S:C7h) – USB Endpoint Number
7
-
6
-
5
-
4
-
3
-
2
-
1
0
EPNUM1
EPNUM0
Bit Bit
Number Mnemonic Description
Reserved
The values read from these Bits are always 0. Do not set these Bits.
7 - 2
1 - 0
-
Endpoint Number Bits
EPNUM1:0 Set this field with the number of the endpoint which shall be accessed when
reading or writing to registers UEPSTAX, UEPDATX, UBYCTLX or UEPCONX.
Reset Value = 0000 0000b
Table 61. UEPCONX Register
UEPCONX (S:D4h) – USB Endpoint X Control Register (X = EPNUM set in UEPNUM)
7
6
-
5
-
4
-
3
2
1
0
EPEN
DTGL
EPDIR
EPTYPE1
EPTYPE0
75
4173E–USB–09/07
ATMEL [ ATMEL ]
