Table 24. Status for Slave Transmitter Mode
Application Software Response
To SSCON
SSSTO SSI
Status of the TWI Bus
and TWI Hardware
Status
Code
SSSTA
To/From SSDAT
SSSTA
SSAA Next Action Taken by TWI Hardware
Write data Byte
X
0
0
0
0
0
1
Last data Byte will be transmitted.
Data Byte will be transmitted.
Own SLA+R has been
received; ACK has
been returned
A8h
B0h
Write data Byte
X
Arbitration lost in
Write data Byte
Write data Byte
X
X
0
0
0
0
0
1
Last data Byte will be transmitted.
Data Byte will be transmitted.
SLA+R/W as master;
own SLA+R has been
received; ACK has
been returned
Data Byte in SSDAT
has been transmitted;
ACK has been
Write data Byte
Write data Byte
X
X
0
0
0
0
0
1
Last data Byte will be transmitted.
Data Byte will be transmitted.
B8h
received
Switched to the not addressed slave mode; no
recognition of own SLA or GCA.
No SSDAT action
No SSDAT action
0
0
0
0
0
0
0
1
Switched to the not addressed slave mode; own
SLA will be recognized; GCA will be recognized if
SSGC = logic 1.
Data Byte in SSDAT
has been transmitted;
NOT ACK has been
received
Switched to the not addressed slave mode; no
recognition of own SLA or GCA. A START condition
will be transmitted when the bus becomes free.
C0h
No SSDAT action
No SSDAT action
1
1
0
0
0
0
0
1
Switched to the not addressed slave mode; own
SLA will be recognized; GCA will be recognized if
SSGC = logic 1. A START condition will be
transmitted when the bus becomes free.
Switched to the not addressed slave mode; no
recognition of own SLA or GCA.
No SSDAT action
No SSDAT action
0
0
0
0
0
0
0
1
Switched to the not addressed slave mode; own
SLA will be recognized; GCA will be recognized if
SSGC = logic 1.
Last data Byte in
SSDAT has been
transmitted
Switched to the not addressed slave mode; no
recognition of own SLA or GCA. A START condition
will be transmitted when the bus becomes free.
C8h
(SSAA= 0); ACK has
been received
No SSDAT action
No SSDAT action
1
1
0
0
0
0
0
1
Switched to the not addressed slave mode; own
SLA will be recognized; GCA will be recognized if
SSGC = logic 1. A START condition will be
transmitted when the bus becomes free.
Table 25. Status for Miscellaneous States
Application Software Response
Status
Code Status of the TWI Bus
SSSTA and TWI Hardware
To SSCON
To/From SSDAT
SSSTA
SSSTO
SSI
SSAA Next Action Taken by TWI Hardware
Wait or proceed current transfer.
No relevant state
information available;
SSI = 0
F8h
00h
No SSDAT action
No SSCON action
Bus error due to an
Only the internal hardware is affected, no STOP
illegal START or STOP No SSDAT action
condition
0
1
0
X
condition is sent on the bus. In all cases, the bus is
released and SSSTO is reset.
144
AT89C5132
4173E–USB–09/07
ATMEL [ ATMEL ]
