Table 20. Status for Master Transmitter Mode
Application Software Response
To SSCON
SSSTO SSI
Status
Code Status of the TWI Bus
SSSTA and TWI Hardware
To/From SSDAT
SSSTA
SSAA Next Action Taken by TWI Hardware
A START condition has
08h
Write SLA+W
X
0
0
X
SLA+W will be transmitted.
SLA+W will be transmitted.
been transmitted
Write SLA+W
Write SLA+R
X
X
0
0
0
0
X
X
A repeated START
condition has been
transmitted
10h
18h
SLA+R will be transmitted.
Logic will switch to master receiver mode
Data Byte will be transmitted.
Write data Byte
No SSDAT action
No SSDAT action
0
1
0
0
0
1
0
0
0
X
X
X
Repeated START will be transmitted.
SLA+W has been
transmitted; ACK has
been received
STOP condition will be transmitted and SSSTO flag
will be reset.
STOP condition followed by a START condition will
be transmitted and SSSTO flag will be reset.
No SSDAT action
1
1
0
X
Data Byte will be transmitted.
Write data Byte
No SSDAT action
No SSDAT action
0
1
0
0
0
1
0
0
0
X
X
X
Repeated START will be transmitted.
SLA+W has been
STOP condition will be transmitted and SSSTO flag
will be reset.
20h
transmitted; NOT ACK
has been received
STOP condition followed by a START condition will
be transmitted and SSSTO flag will be reset.
No SSDAT action
1
1
0
X
Data Byte will be transmitted.
Write data Byte
No SSDAT action
No SSDAT action
0
1
0
0
0
1
0
0
0
X
X
X
Repeated START will be transmitted.
Data Byte has been
transmitted; ACK has
been received
STOP condition will be transmitted and SSSTO flag
will be reset.
28h
STOP condition followed by a START condition will
be transmitted and SSSTO flag will be reset.
No SSDAT action
1
1
0
X
Data Byte will be transmitted.
Write data Byte
No SSDAT action
No SSDAT action
0
1
0
0
0
1
0
0
0
X
X
X
Repeated START will be transmitted.
Data Byte has been
transmitted; NOT ACK
has been received
STOP condition will be transmitted and SSSTO flag
will be reset.
30h
38h
STOP condition followed by a START condition will
be transmitted and SSSTO flag will be reset.
No SSDAT action
1
1
0
X
TWI bus will be released and not addressed slave
mode will be entered.
No SSDAT action
No SSDAT action
0
1
0
0
0
0
X
X
Arbitration lost in
SLA+W or data Bytes
A START condition will be transmitted when the bus
becomes free.
140
AT89C5132
4173E–USB–09/07
ATMEL [ ATMEL ]
