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895132-UL 参数 Datasheet PDF下载

895132-UL图片预览
型号: 895132-UL
PDF下载: 下载PDF文件 查看货源
内容描述: USB微控制器,带有64K字节Flash存储器 [USB Microcontroller with 64K Bytes Flash Memory]
分类和应用: 存储微控制器
文件页数/大小: 182 页 / 1660 K
品牌: ATMEL [ ATMEL ]
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AT89C5132  
Table 23. Status for Slave Receiver Mode with General Call Address  
Application Software Response  
Status  
Code Status of the TWI Bus  
To SSCON  
SSSTA and TWI Hardware  
To/From SSDAT  
No SSDAT action  
No SSDAT action  
SSSTA  
SSSTO  
SSI  
0
SSAA Next Action Taken by TWI Hardware  
General call address  
has been received;  
70h  
X
X
0
0
0
1
Data Byte will be received and NOT ACK will be  
returned.  
ACK has been  
0
Data Byte will be received and ACK will be returned.  
returned  
Arbitration lost in  
SLA+R/W as master;  
No SSDAT action  
No SSDAT action  
X
X
0
0
0
0
0
1
Data Byte will be received and NOT ACK will be  
returned.  
general call address  
78h  
has been received;  
ACK has been  
returned  
Data Byte will be received and ACK will be returned.  
Previously addressed  
X
X
0
0
0
0
0
1
Data Byte will be received and NOT ACK will be  
returned.  
with general call; data Read data Byte  
has been received;  
90h  
ACK has been  
returned  
Read data Byte  
Data Byte will be received and ACK will be returned.  
Switched to the not addressed slave mode; no  
recognition of own SLA or GCA.  
Read data Byte  
Read data Byte  
0
0
0
0
0
0
0
1
Switched to the not addressed slave mode; own  
SLA will be recognized; GCA will be recognized if  
SSGC = logic 1.  
Previously addressed  
with general call; data  
has been received;  
NOT ACK has been  
returned  
Switched to the not addressed slave mode; no  
recognition of own SLA or GCA. A START condition  
will be transmitted when the bus becomes free.  
98h  
Read data Byte  
Read data Byte  
1
1
0
0
0
0
0
1
Switched to the not addressed slave mode; own  
SLA will be recognized; GCA will be recognized if  
SSGC = logic 1. A START condition will be  
transmitted when the bus becomes free.  
Switched to the not addressed slave mode; no  
recognition of own SLA or GCA.  
No SSDAT action  
No SSDAT action  
0
0
0
0
0
0
0
1
Switched to the not addressed slave mode; own  
SLA will be recognized; GCA will be recognized if  
SSGC = logic 1.  
A STOP condition or  
repeated START  
Switched to the not addressed slave mode; no  
recognition of own SLA or GCA. A START condition  
will be transmitted when the bus becomes free.  
A0h  
condition has been  
received while still  
addressed as slave  
No SSDAT action  
No SSDAT action  
1
1
0
0
0
0
0
1
Switched to the not addressed slave mode; own  
SLA will be recognized; GCA will be recognized if  
SSGC = logic 1. A START condition will be  
transmitted when the bus becomes free.  
143  
4173E–USB–09/07  
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