Table 87. External Data Memory Interface Signals
Signal
Alternate
Function
Name
Type Description
Address Lines
A15:8
I/O
Upper address lines for the external bus.
Multiplexed higher address and data lines for the IDE interface.
P2.7:0
Address/Data Lines
AD7:0
ALE
RD
I/O
O
P0.7:0
-
Multiplexed lower address and data lines for the IDE interface.
Address Latch Enable
ALE signals indicates that valid address information is available on lines AD7:0.
Read
Read signal output to external data memory.
O
P3.7
P3.6
Write
WR
O
Write signal output to external memory.
17.2 Registers
Table 88. DAT16H Register
DAT16H (S:F9h) – Data 16 High Order Byte
7
6
5
4
3
2
1
0
D15
D14
D13
D12
D11
D10
D9
D8
Bit
Bit Number Mnemonic Description
Data 16 High Order Byte
When EXT16 bit is set, DAT16H is set by software with the high order data byte prior any
MOVX write instruction.
7 - 0
D15:8
When EXT16 bit is set, DAT16H contains the high order data byte after any MOVX read
instruction.
Reset Value = 0000 0000b
106
AT89C5132
4173E–USB–09/07
ATMEL [ ATMEL ]
