A49FL004
Table 14: Software Data Protection Command Definition
1st Cycle (1)
2nd Cycle
3rd Cycle
4th Cycle
5th Cycle
6th Cycle
Bus
Cycles
Command
Addr(2) Data Addr Data Addr Data Addr Data Addr Data Addr Data
Block Erase
Read
6
1
6
6
4
3
1
3
5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH 55H BA (4)
Addr
5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH 55H SA (3)
50H
DOUT
Sector Erase
Chip Erase (1)
Byte Program
Product ID Entry
Product ID Exit (5)
Product ID Exit (5)
Notes:
30H
5555H AAH 2AAAH 55H 5555H 80H 5555H AAH 2AAAH 55H 5555H 10H
5555H AAH 2AAAH 55H 5555H A0H
5555H AAH 2AAAH 55H 5555H 90H
XXXXH F0H
Addr
DIN
5555H AAH 2AAAH 55H 5555H F0H
1. Chip erase is available in A/A Mux Mode only.
2. Address A[15:0] is used for SDP command decoding internally and A15 must be “0” in FWH/LPC and A/A Mux modes.
AMS - A16 = Don’t care where AMS is the most-significant address of A49FL004.
3. SA = Sector address to be erased.
4. BA = Block address to be erased.
5. Either one of the Product ID Exit command can be used.
PRELIMINARY
(September, 2005, Version 0.0)
19
AMIC Technology, Corp.
AMICC [ AMIC TECHNOLOGY ]
