F I N A L
nom + 6
nom + 3
nom
Output Valid Delay (ns)
nom –3
nom –6
nom –9
50
75
100
125
150
CL (picofarads)
15021B–079
Note:
This graph will not be linear outside the CL range shown.
Figure 18. Typical Output Valid Delay Versus Load Capacitance
at Maximum Operating Temperature (CL=120 pF)
nom + 9
nom + 6
nom + 3
Output Valid Delay (ns)
nom
nom –3
nom –6
75
100
125
150
CL (picofarads)
Note:
This graph will not be linear outside the CL range shown.
15021B–080
Figure 19. Typical Output Valid Delay Versus Load Capacitance
at Maximum Operating Temperature (CL=75 pF)
26
Am386SX/SXL/SXLV Microprocessors Data Sheet
AMD [ AMD ]
