HPR2 and HPR3: HomePNA PHY MII PHY ID
(Registers 2 and 3)
Table 48. HPR2 and HPR3: HomePNA PHY MII ID (Registers 2 and 3)
Read/
Write
Default
Hex
Soft
Reset
Bits
Mnemonic
MII_PHY_ID
Description
15:0
PHY_ID MSB (31-16)
MII_PHY_ID
Most significant bytes of the PHY_ID (Bits 3-18)
R
0000
0000
15:10 PHY_ID LSB (15-10)
IEEE Address (Bits 19-24)
Manufacturer Model Number
Revision Number
R
R
R
1A
39
0
1A
39
0
9:4
3:0
PHY_ID LSB (9-4)
PHY_ID LSB (3-0)
HPR4-HPR7: HomePNA PHY Auto-Negotiation
(Registers 4 - 7)
Table 49. HPR4-HPR7: HomePNA PHY Auto-Negotiation (Registers 4 - 7)
Read/
Write
Default
Soft
Reset
Hex
04
Mnemonic
Description
Hex
0021
0000
0000
0000
Auto-Negotiation Register 4
Auto-Negotiation Register 5
Auto-Negotiation Register 6
Auto-Negotiation Register 7
Advertisement
R
R
R
R
0021
0000
0000
0000
05
Link Partner Ability
Expansion
06
07
Next Page
Reserved Registers: HPR8 - HPR15
These registers should be ignored when read and
should not be written to at any time.
Am79C978
181
AMD [ AMD ]
