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AM79C978KC/W 参数 Datasheet PDF下载

AM79C978KC/W图片预览
型号: AM79C978KC/W
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片1/10 Mbps的PCI家庭网络控制器 [Single-Chip 1/10 Mbps PCI Home Networking Controller]
分类和应用: 控制器PC
文件页数/大小: 261 页 / 3499 K
品牌: AMD [ AMD ]
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BCR33, and BCR34) in the integrated PCnet controller  
to control and communicate to the HomePNA PHY via  
the MDC and MDIO signals.  
1 Mbps HomePNA PHY Internal Registers  
The registers of the HomePNA PHY are accessible via  
the internal MII interface. This interface uses the MII  
Control, Address, and Data Registers (BCR32,  
See Table 46 through Table 63.  
HPR0: HomePNA PHY MII Control (Register 0)  
Table 46. HPR0: HomePNA PHY MII Control (Register 0)  
Read/  
Default  
Hex  
Soft  
Reset  
Bits  
Mnemonic  
Description  
Write  
MII_CONTROL  
1 = RESET  
15  
RESET  
0 = Normal operation  
** Self Clearing  
R/W  
0
0
1 = MII Loopback enabled  
0 = MII Loopback disabled  
14  
13  
12  
Loopback  
R/W  
R
0
0
0
0
0
0
Speed Selection  
Auto-Negotiation Enabled  
0 = 10 Mbps  
1 = Enabled  
0 = Disabled  
R/W  
1 = Power down  
11  
10  
9
Power Down  
0 = Normal operation  
R/W  
R/W  
R/W  
R/W  
0
1
0
0
0
1
0
0
(This bit is mirrored in PHY Control bit 4)  
1 = Electrically isolate PHY from MII  
0 = Normal operation  
Isolate  
1 = Restart Auto-Negotiation  
0 = Normal operation  
** Self Clearing  
Restart Auto-Negotiation  
Duplex Mode  
1 = Full-Duplex (for test purposes only)  
0 = Half-Duplex  
8
7
Collision Test  
Reserved  
0 = Disable COL test signal  
Write as 0, Ignore Read  
R/W  
R/W  
0
0
0
0
6:0  
Am79C978  
179