HPR1: HomePNA PHY MII Status (Register 1)
Table 47. HPR1: HomePNA PHY MII Status (Register 1)
Read/
Default
Hex
Soft
Reset
Bits
Mnemonic
Description
Write
MII_Status
15
14
100BASE-T4
0 = PHY not able to perform 100BASE-T4
R
R
0
0
0
0
0 = PHY not able to perform Full-Duplex
100BASE-X
100BASE-X Full-Duplex
0 = PHY not able to perform Half-Duplex
100BASE-X
13
12
100BASE-X Half-Duplex
10 Mbps Full-Duplex
R
R
0
0
1
0
0
1
0 = PHY not able to perform 10 Mbps in Full-
Duplex
1 = PHY able to perform 10 Mbps in Half-
Duplex
11
10 Mbps Half-Duplex
Reserved
R
R
10:7
Reads will produce undefined results
1 = PHY will accept management frames with
Preamble suppressed
6
MF Preamble Suppression
Auto-Negotiation Complete
R
1
1
0 = PHY will not accept management frames
with Preamble suppressed
1 = Auto-Negotiation completed
5
4
3
R
R
R
0
0
0
0
0
0
0 = Auto-Negotiation not completed
1 = Remote fault detected
0 = Normal operation
Remote Fault
Auto-Negotiation Ability
1 = PHY is able to perform Auto-Negotiation
0 = PHY is not able to perform Auto-Negotiation
1 = Link is up
0 = Link is down
This bit will be RESET (latched low and re-
enabled on Read) on the first occurrence of lost
link and will be SET after completion of valid
LINK process.
2
Link Status
R
0
0
1 = Jabber condition detected
0 = Normal operation
1
0
Jabber Detect
R
R
0
1
0
1
1 = Extended Register Capability
0 = Basic Register Set Capability
Extended Capability
180
Am79C978
AMD [ AMD ]
