the LED output will be a Totem
Pole output and the output value
will be the same polarity as the
LEDOUT status bit).
8
FDLSE
Full-Duplex Link Status Enable.
Indicates the Full-Duplex Link
Test Status. When this bit is set,
a value of 1 is passed to the LED-
OUT signal when the Am79C978
controller is functioning in a Link
Pass state and full-duplex opera-
tion is enabled. When the
Am79C978 controller is not func-
tioning in a Link Pass state with
full-duplex operation being en-
abled, a value of 0 is passed to
the LEDOUT signal.
The setting of this bit will not ef-
fect the polarity of the LEDOUT
bit for this register.
This bit is always read/write ac-
cessible. LEDPOL is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
This bit is always read/write ac-
cessible. FDLSE is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
13
LEDDIS
LED Disable. This bit is used to
disable the LED output. When
LEDDIS has the value 1, then the
LED output will always be dis-
abled. When LEDDIS has the val-
ue 0, then the LED output value
will be governed by the LEDOUT
and LEDPOL values.
7
PSE
Pulse Stretcher Enable. When
this bit is set, the LED illumination
time is extended for each new oc-
currence of the enabled function
for this LED output. A value of 0
disables the pulse stretcher.
This bit is always read/write ac-
cessible. LEDDIS is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
This bit is always read/write ac-
cessible. PSE is set to 1 by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
12
100E
100 Mbps Enable. When this bit
is set to 1, a value of 1 is passed
to the LEDOUT bit in this register
when the Am79C978 controller is
operating in 100 Mbps mode.
6
LNKSE
Link Status Enable. When this bit
is set, a value of 1 will be passed
to the LEDOUT bit in this register
in Link Pass state.
This bit is always read/write ac-
cessible. 100E is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
This bit is always read/write ac-
cessible. LNKSE is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
11-10 RES
Reserved locations. Written and
read as zeros.
5
RCVME
Receive Match Status Enable.
When this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network that has
passed the address match func-
tion for this node. All address
matching modes are included:
physical, logical filtering, broad-
cast, and promiscuous.
9
MPSE
Magic Packet Status Enable.
When this bit is set to 1, a value of
1 is passed to the LEDOUT bit in
this register when Magic Packet
frame mode is enabled and a
Magic Packet frame is detected
on the network.
This bit is always read/write ac-
cessible. MPSE is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
This bit is always read/write ac-
cessible. RCVME is cleared by
H_RESET and is not affected by
Am79C978
177