S_RESET or setting the STOP
bit.
BCR49: PHY Select
This register defines which PHY will be able to send
and receive data over the MII interface. Bits 15:8 are
updated whenever the EEPROM is read, and bits 6:0
are updated only if bit 7 is cleared. The bits are defined
as follows:
4
XMTE
Transmit Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is transmit
activity on the network.
Bit
Name
Description
This bit is always read/write ac-
cessible. XMTE is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
15
PC_NET
PCnet mode. This bit must al-
ways be set.
14-10 RES
Reserved locations. These bits
must be written as zeros.
3
2
POWER
RCVE
Power. When this bit is set to 1,
the device is operating in HIGH
power mode.
9-8
PHY_SEL_Default
PHY Select Default. These bits
store the desired default PHY.
These bits have no effect on the
operation of the device and are
provided only as a storage loca-
tion.
Receive Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is receive ac-
tivity on the network.
7
PHY_SEL_Lock
This bit is always read/write ac-
cessible. RCVE is set to 1 by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
PHY Select Lock. Setting this bit
prevents the PHY_SEL bits from
being overwritten by subsequent
soft resets. The user may write
this bit at any time. It is cleared
during Power-On Reset.
1
0
SPEED
COLE
Speed. When this bit is set to 1,
the device is operating in HIGH
speed mode.
6-2
1-0
RES
Reserved. Must be written as
zero.
Collision Status Enable. When
this bit is set, a value of 1 is
passed to the LEDOUT bit in this
register when there is collision
activity on the network.
PHY_SEL
PHY Select. These bits define the
active PHY as follows:
00
01
10
11
10BASE-T PHY
HomePNA PHY
External PHY
This bit is always read/write ac-
cessible. COLE is cleared by
H_RESET and is not affected by
S_RESET or setting the STOP
bit.
Reserved/Undefined
BCR50-BCR55: Reserved Locations
These registers must be 00h.
178
Am79C978
AMD [ AMD ]
